This document describes the features and characteristics of Altera Corporation's FLEX 10K embedded programmable logic device family, which provides System-on-a-Programmable-Chip (SOPC) integration. It includes an embedded array for implementing efficient memory and specialized logic functions, as well as a logic array for general logic functions. The devices have high gate density, support MultiVolt I/O interface, low power consumption, and compliance with PCI Local Bus Specification.
The FLEX 10K family is Altera's first embedded programmable logic device (PLD) line, offering 10,000 to 250,000 typical gates, up to 40,960 RAM bits, and a variety of I/O options. Devices support 3.3‑V and 5.0‑V supply voltages, low standby power (<0.5 mA), and built‑in JTAG boundary‑scan testing.
The architecture combines a logic array (LABs) and embedded array blocks (EABs) with FastTrack® interconnect for high‑speed routing. Devices are available in many package styles ranging from 84 to 600 pins, and can be reconfigured in‑circuit in less than 320 ms via serial or parallel configuration devices.
| Typical gate count | 10,000 to 250,000 |
|---|---|
| Maximum RAM bits | 40,960 |
| Supported supply voltages | 3.3 V and 5.0 V |
| Standby power consumption | < 0.5 mA |
| Package pin range | 84 to 600 pins |
| In‑circuit reconfiguration time | < 320 ms |
FLEX 10K devices can contain up to 250,000 gates.
Both 3.3‑V and 5.0‑V supply voltages are supported.
Reconfiguration can be performed in less than 320 ms.