This data sheet provides Altera Arria GX family devices specifications, contains information such as data transfer speed, power supply voltage, operating temperature, pin definition, package etc.
This handbook supplies designers with detailed data‑sheet specifications for the Arria™ GX family of FPGA devices, covering transceiver features, internal architecture, configuration, testing, DC and switching characteristics, power consumption, and ordering information. It is organized into chapters that address device family overview, architecture, configuration and testing, DC & switching characteristics, and reference and ordering information.
The document includes tables of device features such as transceiver channel counts, logic array voltage options, memory resources, DSP blocks, PLLs, package options, and pin counts. Revision history and ordering codes are also provided for each device variant.
| Transceiver channels per device | 4, 8, or 12 high‑speed full‑duplex channels |
|---|---|
| Logic array voltage | 1.2 V (and 1.5 V PCML) |
| Number of PLLs per device | Up to 4 enhanced PLLs |
The EP1AGX60E device includes 12 high‑speed transceiver channels.
The Arria GX logic array supports 1.2 V and 1.5 V pseudo current mode logic (PCML).
The handbook was initially released in May 2007 (version 1.0).