IDT Manuals - Page 5

IDT manuals, page 5

• IDT IDT72805LB IDT72815LB IDT72825LB IDT72835LB IDT72845LB handbook

  The IDT72805LB, IDT72815LB, IDT72825LB, IDT72835LB, and IDT72845LB are dual-directional synchronous FIFO chips produced by Integrated Device Technology (IDT) company. They have the characteristics of large capacity, high speed, flexible design, and small size. They are suitable for network switching, two-level parallel data prioritization, bidirectional data transfer, bus-matching between 18-bit and 36-bit data paths, 36-bit/package width expansion, and 8192 words/package depth expansion.

• IDT IDT71V35761S IDT71V35781S IDT71V35761SA IDT71V35781SA handbook

  This document introduces the features and characteristics of IDT71V35761/781 high-speed SRAM, including 128K x 36/256K x 18 memory configurations, high system speed, LBO input selection, self-timed write cycle, etc.

• IDT IDT7188S IDT7188L handbook

  The IDT7188 is a 65,536-bit high-speed static RAM organized as 16K x 4. It is fabricated using IDT’s high-performance, high-reliability technology — CMOS. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost effective approach for memory intensive applications. Access times as fast as 25ns are available. The IDT7188 offers a reduced power standby mode, ISB1, which is activated when CS goes HIGH. This capability significantly decreases power while enhancing system reliability. The low-power version (L) version also offers a battery backup data retention capability where the circuit typically consumes only 30µW operating from a 2V battery. All inputs and outputs are TTL-compatible and operate from a single 5V supply. The IDT7188 is packaged in a 22-pin, 300 mil ceramic DIP providing excellent board-level integration and reliability.

• IDT IDT70V639S handbook

  The DSC-5621/3 is a dual-port synchronous dynamic random access memory (SRAM) device from IDT that supports 3.3V and 2.5V power supplies and is available in 128-pin Thin Quad Flatpack, 208-ball fine pitch Ball Grid Array and 256-ball Ball Grid Array packages. The device features a high-performance 6T SRAM structure and has 10/12/15ns (max.) high-speed access speeds, allowing for simultaneous access to the same memory location. DSC-5621/3 supports JTAG and operates in the industrial temperature range (–40°C to +85°C).

• IDT IDT709289L handbook

  This document introduces the high-speed 64K x 16 synchronous pipelined dual-port static RAM product from IDT, which features high-speed access, low power operation, and pipelined output mode.

• IDT IDT74LVCH16501A handbook

  IDT74LVCH16501A is a 3.3V CMOS 18-bit registered bus transceiver with 5V tolerant I/O and bus-hold, and it can operate in industrial temperature range. Its features include: typical tSK(o) (output skew) <250ps, ESD>2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0), VCC = 3.3V ± 0.3V, Normal Range, VCC = 2.7V to 3.6V, Extended Range, CMOS power levels (0.4µµµµµ W typ. static), all inputs, outputs, and I/O are 5V tolerant, supports hot insertion, and available in SSOP, TSSOP, and TVSOP packages.

• IDT IDT74ALVCH16825 Data Sheet

  IDT74ALVCH16825 3.3V CMOS 18-bit buffer/driver with 3-state outputs and bus-hold

• IDT 28(+1) Channel High-Density T1/E1/J1 Line Interface Unit IDT82P2828 service manual

  This is a 28（+1）channel high-density T1/E1/J1 line interface unit

• IDT IDT54/74FCT377T/AT/CT/DT handbook(1)

  The IDT54/74FCT377T/AT/CT/DT are octal D flip-flops built using an advanced dual metal CMOS technology. They have eight edge-triggered, D-type flip-flops with individual D inputs and O outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s O output. The CE input must be stable only one set-up time prior to the LOW-to-HIGH transi- tion for predictable operation.

• IDT IDT72420 IDT72200 IDT72210 IDT72220 IDT72230 IDT72240 handbook

  IDT72420/22200/22210/22220/22230/22240 is a CMOS SyncFIFO with 64 x 8, 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8 organizations.

• IDT DT54/74FCT16245T/AT/CT/ET IDT54/74FCT162245T/AT/CT/ET IDT54/74FCT166245T/AT/CT IDT54/74FCT162H245T/AT/CT/ET handbook

  FCT16245T/2245T/6245T are 16-bit transceivers built using advanced dual metal CMOS technology. These high-speed, low-power transceivers are ideal for synchronous communication between two busses (A and B).

• IDT IDT7200L IDT7201LA IDT7202LA handbook

  This document introduces the CMOS asynchronous FIFO product series from Integrated Device Technology, Inc., including models IDT7200L, IDT7201LA, and IDT7202LA, as well as their features and characteristics. These products are dual-port memories that load and empty data on a first-in/first-out basis. They support multiple organizations and low power consumption. They also feature high-speed access, asynchronous read and write, expandability, and auto-retransmit capability.

• IDT IDT79R4700 64-Bit RISC Microprocessor

  The DSC 9096 64-bit RISC Microprocessor is a high-performance, high-integration, low-power 64-bit processor that supports 64-bit integer and floating-point operations, has a 200MHz clock frequency, 64GB physical address space, and 179 or 208-pin packages.

• IDT IDT72V8980 3.3 VOLT TIME SLOT INTERCHANGE

• IDT IDT72V223 IDT72V233 3.3 VOLT HIGH-DENSITY SUPERSYNC II

  This is a datasheet for IDT72V223, IDT72V233, IDT72V243, IDT72V253, IDT72V263, IDT72V273, IDT72V283, IDT72V293.