IDT Manuals - Page 2

IDT manuals, page 2

• IDT IDT723626 IDT723636 IDT723646 DATA SHEET

  The document describes the features and characteristics of the IDT723626, IDT723636, and IDT723646 products, including memory storage capacity, clock frequencies, FIFO data buffering, etc.

• IDT IDT70V24S/L HIGH-SPEED 3.3V IDT70V24S/L 4K x 16 DUAL-PORT STATIC RAM

  IDT70V24S/L is a 4K x 16 dual-port static RAM produced by IDT company. It supports simultaneous access to the same memory location, has high speed and low power consumption, and can expand the data bus width to 32 bits or more by using the Master/Slave select when cascading more than one device. It also has anti-static and interrupt functions.

• IDT IDT54/74FCT16646T/AT/CT/ET IDT54/74FCT162646T/AT/CT/ET

  16-bit fast CMOS registered transceivers/registers (3-state)

• IDT 79RC32355 DATA SHEET

  This document describes the features and characteristics of IDT's DSC 5900 product, including a 32-bit microprocessor, enhanced MIPS-II ISA, DSP instructions, MMU, cache management, interrupt controller, I2C interface, UARTs, counter/timers, general-purpose I/O pins, SDRAM controller, and peripheral device controller.

• IDT IDT54/74FCT16245T/AT/CT/ET data sheet

  IDT54/74FCT16245T/AT/CT/ET Fast CMOS 16-bit bidirectional transceiver Military and Industrial temperature ranges

• IDT IDT23S05E DATA SHEET

  IDT23S05E is a 3.3V zero delay clock buffer from IDT company. It is suitable for high-speed clock distribution applications. The device accepts one reference input and drives five low-skew clocks.

• IDT IDT54/74FCT138T/AT/CT handbook

  This data sheet provides details of the IDT54/74FCT138T/AT/CT 1-of-8 decoder. The decoder has three binary weighted inputs (A0, A1, and A2) and, when enabled, provides eight mutually exclusive active LOW outputs (O0-O7). The decoder also has three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four IDT54/74FCT138T/AT/CT devices and one inverter.

• IDT IDT72T7285 IDT72T7295 IDT72T72105 IDT72T72115

  This document is a functional block diagram of IDT72T7285, IDT72T7295, IDT72T72105, IDT72T72115. The main features are selectable 2.5V LVTT input and output, support up to 225MHz clock operation, have read enable and read clock echo outputs, and support asynchronous read and write port timing.

• IDT IDT70V631S HIGH-SPEED 3.3V 256K x 18 ASYNCHRONOUS DUAL-PORT STATIC RAM

  This document introduces IDT70V631S, a high-speed, low-power 3.3V 256K x 18 asynchronous dual-port static RAM. It features fully asynchronous operation, support for JTAG, and is available in a variety of packages for use in industrial temperatures (-40°C to +85°C).

• IDT IDT70V25S/L handbook

  IDT70V25 is a 8Kx16 dual-port static RAM produced by IDT company, which has the characteristics of high-speed access, low power consumption, independent upper and lower byte control.

• IDT IDT29FCT520AT/BT/CT/DT IDT29FCT521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS

  The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/ BT/CT/DT each contain four 8-bit positive edge-triggered registers. These may be operated as a dual 2-level or as a single 4-level pipeline. A single 8-bit input is provided and any of the four registers is available at the 8-bit, 3-state output. These devices differ only in the way data is loaded into and between the registers in 2-level operation. The difference is illustrated in Figure 1. In the IDT29FCT520AT/BT/CT/DT when data is entered into the first level (I = 2 or I = 1), the existing data in the first level is moved to the second level. In the IDT29FCT521AT/BT/CT/DT, these instructions simply cause the data in the first level to be overwritten. Transfer of data to the second level is achieved using the 4-level shift instruction (I = 0). This transfer also causes the first level to change. In either part I=3 is for hold.

• IDT IDTQS3257 Data Sheet

  The IDTQS3257 is a high-speed CMOS LVTTL-compatible quad 2:1 multiplexer/demultiplexer with zero propagation delay and zero ground bounce noise. It can be used as a logic replacement for video, audio, graphics switching and muxing, as well as hot-swapping and voltage translation applications.

• IDT IDT72V81 Data Sheet

  This document describes the DSC-3966/- products produced by Integrated Device Technology, Inc. in 1999, including models such as IDT72V81, IDT72V82, IDT72V83, IDT72V84, and IDT72V85. These products are dual-FIFO memories with features such as 15 ns ultra-high speed access time, low power consumption, asynchronous and simultaneous read and write, space-saving TSSOP package, etc. They are ideal for bidirectional, width expansion, depth expansion, bus-matching, and data sorting applications.

• IDT IDT72V2103 IDT72V2113 Data Sheet

• IDT IDT71V2577S IDT71V2579S Data Sheet

  IDT71V2577/79 is a 128K x 36/256K x 18 high-speed SRAM.