This document provides errata, specification changes, and clarifications for the Numonyx StrataFlash P30 Embedded Memory, including design defects and…
This document serves as a specification update for the Numonyx StrataFlash Embedded Memory (P30) family, released in June 2008. It consolidates known design defects (errata), modifications to published specifications, and clarifications regarding complex design situations. The update is intended for hardware system manufacturers and software developers to ensure proper device operation and design compliance.
| Read Access Time (256M TSOP) | 95ns |
|---|
The synchronous read input signals (ADV# and CLK) should be tied off to support asynchronous reads.
Increase the Tres spec from 500uS to 1mS, or continue increasing in increments of 500uS up to a maximum of 2.5mS.