This guide covers power management, hot-socketing, power-on reset (POR) requirements, and recommended power-up sequences for Altera Cyclone V devices.
This document details the power management features of the Cyclone V family of devices, specifically focusing on power consumption components, dynamic power formulas, and the implementation of hot-socketing capabilities. It explains how the device handles power-up and power-down sequences to prevent latch-up and ensure safe operation during system integration.
The guide provides specific technical information regarding the Power-On Reset (POR) circuit, including monitored and unmonitored power rails, the relationship between ramp-up time and POR delay, and recommended power-up sequences to minimize transient current. It also includes tables listing maximum transient currents and their typical durations for various power rails. This manual is written in Chinese.
| I/O Pad Capacitance for Hot-Socketing | Less than 15pF |
|---|---|
| Clock Pin Capacitance for Hot-Socketing | Less than 20pF |
The 3.3-V tolerance control circuit supports driving I/O pins with 3.3V voltage before the device enters user mode.
If the power-up time exceeds tRAMP, the Cyclone V device I/O pins and programming registers remain in tri-state, causing configuration failure.
The POR circuit monitors VCCBAT, VCC, VCCPD, VCCPGM, VCC_HPS, VCCPD_HPS, VCCIO, VCCIO_HPS, VCCPLL_HPS, VCC_AUX, VCC_AUX_SHAREDP, VCCRSTCLK_HPS, and VCCPLL_HPS.