Altera Stratix II GX PCI Express Development Board Reference Manual

Altera Stratix II GX PCI Express Development Board Reference Manual is the reference manual for the Stratix II GX PCI Express Development Board.


Altera Stratix II GX PCI Express Development Board Reference Manual - cover page
Brand
Altera
Category
Other Electronics
Document type
User Manual
Language
English
Pages
70
File format
PDF
File size
2.4 MB
Published
17 February, 2012
Updated
30 September, 2023
MD5 checksum
263A61E6A6858D08199511441F615CA5

About this manual

The Stratix II GX PCI Express Development Board provides a hardware platform for developing high‑performance PCIe designs and demonstrates the Stratix II GX device’s embedded transceiver and memory circuitry. It includes up to 16 integrated transceiver channels, DDR2 SDRAM, QDRII SRAM, and a variety of high‑speed interfaces such as PCIe, Gigabit Ethernet, SFP modules, and high‑speed mezzanine connectors.

The board can be powered from the PCIe host (12 V and 3.3 V pins) or an external DC input jack (9 V‑20 V). Proper anti‑static handling is required to avoid damage, and the manual details power distribution, clock sources, and connector pin‑outs for successful integration.

What's inside

  • Introduction
  • Board Features
  • Board Components & Interfaces
  • Power Supply and Distribution
  • Handling the Board
  • Clocking Circuitry
  • PCI Express Interface
  • Memory Interfaces

Specifications

Memory TypesDDR2 SDRAM, QDRII SRAM
Gigabit Ethernet InterfaceGigE PHY + RJ45
External Power Input9 V‑20 V DC jack
Transceiver ChannelsUp to 16 integrated channels

Frequently asked questions

How many transceiver channels does the board support?

It supports up to 16 integrated transceiver channels.

What precaution is required when handling the board?

Anti‑static handling must be used to avoid damage to the board.

Which memory interfaces are available on the board?

The board includes DDR2 SDRAM and QDRII SRAM memory interfaces.

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