This document is a user guide for Altera's Quartus II. It provides instructions on design inputs methods such as block diagram/schematic, text editing, memory editing, and importing from third-party tools. The document also covers the design flow and the usage of the module editor in Quartus II.
This manual describes the complete workflow for using Altera Quartus II, covering design input methods such as schematic entry, AHDL, VHDL, Verilog, Hex, Mif, EDIF and VQM. It explains how to create and edit block/schematic documents, edit memory and text files, and generate HDL output.
The guide also details the device programming process, including JTAG chain configuration, cable setup, and how to start and monitor the download of designs to target hardware. This manual is written in Chinese.
| Supported file extensions | .bdf, .tdf, .vhd, .vhdl, .v, .vlg, .edif, .edf, .bsf |
|---|---|
| Design input methods | schematic, AHDL, VHDL, Verilog, Hex, Mif, EDIF, VQM |
Choose File > New > Block/Schematic document from the menu.