This application note describes how to implement PSoC control of a brushless DC (BLDC) motor using sensorless, back-EMF techniques.
The document introduces a sensor‑less brushless DC (BLDC) motor driver built around Cypress PSoC. It describes the driver architecture, including the three‑phase bridge, IGBT driver, low‑pass filters and the back‑EMF sensing method.
Detailed sections cover driver specifications, block diagrams, PWM generation, operation stages from start‑up to free‑run, and design considerations such as LPF cutoff frequency and fault handling. Appendices provide schematics and photos of the assembled driver. This manual is written in Chinese.
| Input voltage | 220V AC ± 20% |
|---|---|
| Output power | 100W |
| Maximum output current | 3.5A |
| Output signal frequency | 50 Hz – 120 Hz |
| Motor type | BLDC, sensorless |
| Motor pole pairs | 4 |
The driver is designed for 220 V AC with a tolerance of ±20 %.
The driver can supply up to 3.5 A of output current.
The output signal frequency ranges from 50 Hz to 120 Hz.