Cypress CY8C24123A, CY8C24223A, CY8C24423A PSoC Mixed-Signal Array Final Data Sheet

This document is a PSoC™ Mixed-Signal Array Final Data Sheet published by Cypress MicroSystems, Inc. It mainly introduces the characteristics and functions of the CY8C24123A, CY8C24223A, and CY8C24423A products.


Cypress CY8C24123A, CY8C24223A, CY8C24423A PSoC Mixed-Signal Array Final Data Sheet - cover page
Brand
Cypress
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
50
File format
PDF
File size
510 KB
Published
07 April, 2012
Updated
01 October, 2023
MD5 checksum
A82F6FE440C0D8DA283B1C9355817736

About this manual

The CY8C24x23A family is part of Cypress' PSoC™ Mixed‑Signal Array line. Each device integrates a configurable analog system (up to six analog blocks), a digital system (up to four digital blocks), and a core that includes an M8C CPU, 4 KB Flash, 256 B SRAM, and optional EEPROM emulation. The architecture provides flexible routing, programmable I/O, and a range of peripherals such as ADCs, DACs, timers, PWMs, UART, SPI, and I²C.

Development is supported by the PSoC Designer IDE, which offers a device editor, design browser, code editor, and in‑circuit emulator. The data sheet also lists system resources like internal oscillators, voltage references, and a switch‑mode pump, and points to additional technical reference manuals and online support resources.

What's inside

  • Functional Overview
  • PSoC Core
  • Digital System
  • Analog System
  • System Resources
  • Getting Started
  • Development Tools
  • PSoC Designer Software Subsystems
  • Designing with User Modules
  • Document Conventions

Specifications

CPU CoreM8C processor, up to 24 MHz
Temperature Range-40 °C to +85 °C
Flash Memory4 KB
SRAM256 Bytes
EEPROM Emulationup to 2 KB
Analog InputsUp to 10 analog inputs on GPIO
Analog OutputsTwo 30 mA analog outputs
Digital I/O Drive25 mA sink per GPIO
ADC ResolutionUp to 14‑bit

Frequently asked questions

What CPU core is used in the CY8C24x23A devices?

The devices use an M8C processor core that can run at speeds up to 24 MHz.

How much Flash memory is available on these PSoC devices?

Each device provides 4 KB of Flash program storage.

What analog resolution can the ADCs achieve?

The analog blocks include ADCs with up to 14‑bit resolution.

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