This application note describes how to configure the SPEAr600 embedded MPU's multi-port memory controller (MPMC) to use different types of DDR and DDR2 memories and tune the parameters in accordance with JEDEC requirements and the flexibility available in the application.
This document provides software developers with information on utilizing the Fast Interrupt Request (FIQ) mechanism within the Linux kernel for the SPEAr embedded MPU family. It details the interrupt logic, hardware mechanisms, and software requirements for implementing FIQ handlers to ensure low-latency interrupt handling suitable for real-time systems.
The note includes a section on measuring IRQ and FIQ latency using a specific Linux kernel module. It describes the module's functionality, how to activate measurement modes via sysfs, and presents performance measurement results obtained on an SPEAr Plus 600 application board running Linux kernel version 2.6.27.
| Kernel version used for measurements | Linux kernel version 2.6.27 |
|---|---|
| CPU frequency | ARM core running @333 MHz |
| RAM capacity and speed | 128 MB DDR2 running @333 MHz |
| Flash memory capacity | 8 MB NOR |
| Timer interval | 1 millisecond |
| Timer tick interval | 1/48 microsecond |
| Latency measurement range | 0 to 200 microseconds |
The frequency counter captures latency from 0 to 9600 ticks, which corresponds to a range of 0 to 200 microseconds.
No, kernel mode APIs and device driver framework cannot be used inside the FIQ handler because they may rely on timers or spinlocks.
You must activate the mode by running the command '#echo 1 > fiq_mode'.