This document describes the features and characteristics of the SPEAr embedded MPU family, including configurable MPUs based on the ARM926 CPU core and embedded ARM PL011 UARTs for asynchronous communications.
The document provides an application note for the SPEAr embedded MPU family, which includes configurable MPUs based on the ARM926 CPU core. It details the configuration of embedded ARM PL011 UARTs for asynchronous communications, covering both Linux drivers and OS-independent hardware abstraction layers (HAL).
The guide covers specific UART signal connections and memory maps for various SPEAr models, including SPEAr600, SPEAr300, SPEAr310, SPEAr320, and SPEAr320S. It explains how to manage clock sources, change baud rates, implement protocol flow control, and utilize DMA interfaces for data transfer.
| CPU Core | ARM926 |
|---|---|
| UART Type | ARM PL011 |
| SPEAr600 UART Count | 2 |
| SPEAr320S UART Count | 7 |
It describes how to configure the UART and transmit and receive data in the SPEAr embedded MPU family.
Yes, a Linux driver is available in the SPEAr Linux support package (LSP).
The SPEAr320S can be configured to have up to 7 UARTs.