This document analyzes the power consumption of ADSP-21375 SHARC® processors and introduces the characterization data measured over power supply voltage, core frequency (CCLK), and junction temperature (TJ) to help board designers estimate their power budget for power supply design and relief designs using ADSP-21375 processors.
This document, Engineer-to-Engineer Note EE-319, discusses the power consumption of ADSP-21375 SHARC processors. It details how to estimate the total power budget for board designers by analyzing power supply voltage, core frequency, and junction temperature. The processor is a 32-bit device optimized for high-precision signal processing, available in commercial and industrial temperature ranges with core clock frequencies up to 266 MHz.
| Core Clock Frequency Range | 100-266 MHz |
|---|---|
| Core Voltage (266 MHz) | 1.2 V |
| I/O Voltage | 3.3 V |
| Architecture | Super Harvard |
The intent is to assist board designers in estimating their power budget for power supply design and relief designs using ADSP-21375 processors.
Total power consumption is the sum of power consumed for both power supply domains (Vppwr and Vppexr), including internal circuitry and external output drivers.
The two components are power due to internal circuitry (core and PLL) and power due to the switching of external output drivers (I/O).