This document describes the technical details of implementing software overlays on ADSP-218x DSPs.
This document discusses the implementation of software overlays on Analog Devices ADSP-218x Digital Signal Processors (DSPs). It explains that due to limited address space, many derivatives provide multiple memory pages called hardware overlays. The software overlay technique is a different scheme used when a processor does not have sufficient internal memory to hold all application data or program code.
The guide details how the VisualDSP++ linker automatically generates overlay constants to configure Byte DMA (BDMA) parameters in an overlay manager. It provides a simple assembly example where two functions, Fast-LED-Blink and Slow-LED-Blink, reside in external byte memory and are loaded into internal memory at runtime. The document includes specific instructions for defining run and live spaces in the Linker Description File (.LDF) and setting up the Procedure Linkage Table (PLIT).
It is a technique used to populate physical SRAM with different data or code on demand when a processor lacks sufficient internal memory.
An overlay manager initializes byte DMA (BDMA) to transfer the data or code from external memory into internal memory when required.
It generates overlay constants that configure the BDMA parameters in the overlay manager.