Describes the I/O standards supported by the Altera Stratix and Stratix GX devices
This document provides an overview of the flexible I/O capabilities available in Stratix and Stratix GX programmable logic devices. It explains how these features support high-performance solutions for complex system designs by connecting to various microprocessors, peripherals, and standard logic functions.
The guide covers specific industry standards supported by the devices, ranging from general-purpose LVTTL/LVCMOS levels (3.3-V, 2.5-V, 1.8-V, 1.5-V) to high-speed interfaces like PCI, AGP, SSTL, HSTL, LVDS, and HyperTransport. It includes performance data for each standard and notes on implementation details such as termination requirements.
| 3.3-V LVTTL General Purpose Performance | 350 MHz |
|---|---|
| 2.5-V LVTTL Normal Voltage Range Input | -0.3 V |
| 2.5-V LVTTL Normal Voltage Range Output | 2.1 V |
| PCI Local Bus Operating Frequency | 64-bit /66-MHz |
The standard specifies a wider input voltage range of -0.5 V No, the LVTTL standard does not require input reference voltages or board terminations. The normal range minimum output requirement is 1.05 V.Do Stratix and Stratix GX devices require board terminations for LVTTL?
What is the minimum high-level output voltage for 1.5-V LVCMOS?