Introduces the overview, features, design and applications of the Arria GX device.
This document serves as a comprehensive technical reference for the Altera Arria GX FPGA family. It provides detailed information on device architecture, including transceiver paths, logic array blocks, adaptive logic modules, and digital signal processing blocks.
The handbook covers configuration methods such as JTAG boundary-scan support and remote system upgrades, along with extensive DC and switching characteristics. Key topics include absolute maximum ratings, recommended operating conditions, I/O standard specifications, power consumption data, and timing models for various device speeds.
| Document Version | 2.0 |
|---|---|
| Software Version | 9.1 |
This handbook covers Software Version 9.1.
The document was published in December 2009.
This handbook describes the Arria GX Device Family.