The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided to ease AC coupling input signals. The higher frequency outputs provide the device with a >1.0GHz bandwidth to meet the needs of the most demanding system clock. Both, separate selects and a common select, are provided to make the device well suited for both data path and random logic applications. The differential inputs have internal clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5V below VCC.
The document describes the MC10E457 and MC100E457, which are 3-bit differential 2:1 multiplexers designed for low skew clock or other skew-sensitive signals. These devices feature fully differential data paths with a bandwidth exceeding 1.0GHz to meet demanding system clock requirements.
| Propagation Delay (Max) | >1.0GHz bandwidth |
|---|---|
| Package Type | 28-Lead PLCC |
| Input Clamp Resistance | 75kΩ |
| VBB Output Reference Voltage (Typ) | -1.30V to -1.26V |
The device has a maximum propagation delay of 700ps.
Yes, the differential inputs have internal clamp structures that force the output to a LOW state if inputs are open.
The MC100E457 supports an extended VEE range from -4.2V to -5.46V.