The MC10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the translation of a clock and a data signal. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT22 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels.
The document describes the MC10ELT/100ELT22, a dual TTL to differential PECL translator designed for applications requiring the translation of clock and data signals. It utilizes the MOSAIC 1.5 process and is available in an 8-lead SOIC package with low skew characteristics.
| Typical Propagation Delay | 1.5ns |
|---|---|
| Typical Output to Output Skew | <300ps |
| Package Type | Small Outline SOIC Package |
| Storage Temperature Range | -55 to +150 °C |
The MC10ELT is compatible with positive MECL 10H logic levels.
The MC100ELT is compatible with positive ECL 100K logic levels.
The maximum DC supply voltage referenced to GND is 7.0V.