Philips 74HC/HCT165 8-bit Parallel-in/Ser Shift Register Datasheet

The 74HC/HCT165 is a high-speed Si-gate CMOS device that is pin compatible with low power Schottky TTL (LSTTL) and is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT165 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs (Q7 and Q7) available from the last stage.


Philips 74HC/HCT165 8-bit Parallel-in/Ser Shift Register Datasheet - cover page
Brand
Philips
Category
INTEGRATED CIRCUITS
Document type
Datasheet
Language
English
Pages
10
File format
PDF
File size
66 KB
Published
02 July, 2012
Updated
30 September, 2023
Model
74HC
MD5 checksum
1E87101B3258C68D58F8D1A707F032CF

About this manual

The Philips 74HC/HCT165 is a high-speed Si-gate CMOS device that functions as an 8-bit parallel-load or serial-in shift register. It features asynchronous parallel loading and synchronous serial input, with complementary serial outputs available from the last stage.

These devices are pin compatible with low power Schottky TTL (LSTTL) and comply with JEDEC standard no. 7A. The clock input utilizes a gated-OR structure allowing one input to serve as an active LOW clock enable.

What's inside

  • Features
  • General Description
  • Applications
  • Quick Reference Data
  • Pin Description
  • Function Table
  • DC Characteristics for 74HC
  • AC Characteristics for 74HCT

Specifications

Device Type8-bit parallel-load or serial-in shift register
TechnologyHigh-speed Si-gate CMOS
TTL CompatibilityLow power Schottky TTL (LSTTL)
Standard ComplianceJEDEC standard no. 7A
Max Clock Frequency (HC)56 MHz

Frequently asked questions

What is the function of the PL input?

The PL (parallel load) input loads parallel data from D0 to D7 into the register asynchronously when it is LOW.

How does data enter the register in serial mode?

Data enters the register serially at the D0 input and shifts one place to the right with each positive-going clock transition when PL is HIGH.

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