Philips 74HC/HCT166 8-bit Parallel-in/Serial-out Shift Register Datasheet

74HC/HCT166 8-bit parallel-in/serial-out shift register


Philips 74HC/HCT166 8-bit Parallel-in/Serial-out Shift Register Datasheet - cover page
Brand
Philips
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
10
File format
PDF
File size
87 KB
Published
02 July, 2012
Updated
30 September, 2023
Model
74HC
MD5 checksum
315CFB548948A8AFDB5C4FF5DA799993

About this manual

The Philips 74HC/HCT166 is an 8-bit shift register designed for synchronous parallel-to-serial applications. It features a fully synchronous serial or parallel data entry selected by an active LOW parallel enable (PE) input. The device includes a clock enable input for a 'do nothing' mode and an asynchronous master reset to clear the register.

What's inside

  • Features
  • General Description
  • Quick Reference Data
  • Pin Description
  • Function Table
  • DC Characteristics
  • AC Waveforms

Specifications

Number of bits8-bit
Technologyhigh-speed Si-gate CMOS
Propagation delay (CP to Q7, HC)15 ns (typ)
Propagation delay (MR to Q7, HC)14 ns (typ)

Frequently asked questions

How is data entered in parallel mode?

Parallel data is entered when the PE input is LOW, requiring a set-up time prior to the LOW-to-HIGH clock transition.

How is data entered in serial mode?

When PE is HIGH, data enters from the serial input (Ds) and shifts right with each positive-going clock transition.

What is the function of the MR input?

A LOW on the master reset (MR) input overrides all other inputs and clears the register asynchronously.

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