Analog Devices ADN2807 155/622 Mb/s Clock and Data Recovery IC Datasheet

ADN2807 Rev. A is a 155/622 Mb/s clock and data recovery IC with integrated limiting amp


Analog Devices ADN2807 155/622 Mb/s Clock and Data Recovery IC Datasheet - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
21
File format
PDF
File size
356 KB
Published
08 June, 2012
Updated
30 September, 2023
Model
ADN2807
MD5 checksum
CAE841103F930C869FA12EE26482A16C

About this manual

The ADN2807 is a 155/622 Mb/s Clock and Data Recovery (CDR) IC designed to meet SONET requirements for jitter transfer, generation, and tolerance. It features an integrated limiting amplifier, a quantizer with adjustable slice level, and supports rates up to OC-12 and 15/14 FEC. The device can operate with a single-reference clock frequency or an on-chip oscillator with an external crystal.

What's inside

  • Specifications
  • Absolute Maximum Ratings
  • Thermal Characteristics
  • Pin Configuration
  • Theory of Operation
  • Functional Description
  • Multirate Clock and Data Recovery
  • Application Information
  • PCB Design Guidelines
  • Ordering Guide

Specifications

Quantizer Differential Input Sensitivity4 mV p-p typical
Quantizer DC Input Voltage Range0 to 1.2 V
Power Supply Voltage3.3 V typical
Power Supply Current164 mA typical
Package Type7 mm x 7 mm 48-lead LFCSP
Jitter Transfer Bandwidth (OC-12)200 kHz typical
Jitter Generation (OC-12)0.003 UI rms

Frequently asked questions

What are the supported data rates for the ADN2807?

The device supports OC-3, OC-12, and 15/14 FEC rates.

Can the ADN2807 use an internal oscillator?

Yes, it includes an optional 19.44 MHz on-chip oscillator to be used with an external crystal.

What is the typical power consumption of the ADN2807?

The typical power consumption is 540 mW.

What is the package size of the ADN2807?

The device is available in a compact 7 mm x 7 mm 48-lead chip-scale package (LFCSP).

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