This high-density, high-performance electrically-erasable complex programmable logic device has a 3.0 to 3.6V operating range, 32 macrocells, 5 product terms per macrocell, expandable up to 40 per macrocell, 44 pins, 15 ns maximum pin-to-pin delay, registered operation up to 77 MHz, and enhanced routing resources.
The document describes the Atmel ATF1502ASV as a high-density, high-performance CPLD utilizing electrically-erasable technology. It features 32 macrocells and operates within a 3.0 to 3.6V range.
Key capabilities include in-system programmability (ISP) via JTAG, support for IEEE Std. 1149.1 boundary-scan testing, and advanced power management options such as pin-controlled standby mode and programmable pin-keeper inputs.
| Operating Voltage Range | 3.0 to 3.6V |
|---|---|
| Number of Macrocells | 32 |
| Maximum Pin-to-pin Delay | 15 ns |
| Registered Operation Frequency | up to 77 MHz |
| Number of Pins (PLCC/TOFP) | 44 |
| Program/Erase Cycles | 10,000 |
| Data Retention Time | 20 years |
The device operates within a voltage range of 3.0 to 3.6V.
Yes, it supports In-System Programmability (ISP) via JTAG.
The device supports registered operation up to 77 MHz.