The PC107A PCI Bridge/Integrated Memory Controller features a processor bus frequency of up to 100 MHz, a 64-bit or 32-bit data bus, and a 32-bit address bus. It supports asynchronous SRAM, burst SRAM, or pipelined burst SRAM. It is compliant with PCI Specification, Revision 2.1 and operates at up to 66 MHz/5.0V. It also complies with the IEEE 1149.1 standard for JTAG boundary-scan interface. The controller offers power-saving modes such as Nap, Doze, and Sleep. It includes a two-channel integrated DMA controller, a message unit with intelligent I/O, an Inter-Integrated Circuit controller, and an embedded programmable interrupt controller with five hardware interrupts or 16 serial interrupts.
The Atmel PC107A is a high-performance integrated circuit designed to provide a bridge between the Peripheral Component Interconnect (PCI) bus and PowerPC 603e, 740, or 750 microprocessors. It integrates essential system functions including a memory controller, DMA controller, interrupt controller, and various I/O interfaces to reduce packaging requirements for embedded systems.
The device utilizes a 2.5V HiP3 process technology and is fully compatible with TTL devices. Key features include support for up to two processors on a 64-bit or 32-bit bus operating at frequencies up to 100 MHz, a PCI interface compliant with Specification Revision 2.1, and dynamic power management modes such as Nap, Doze, and Sleep.
| Technology | 0.29 um CMOS, five-layer metal |
|---|---|
| Die size | 50 mm² |
| Transistor count | 0.96 million |
| Package type | 503 Plastic Ball Grid Array (C4/PBGA) |
| Core power supply | 2.5V + 5% V DC |
| Processor Bus Frequency | up to 100 MHz |
| PCI Interface Frequency | up to 66 MHz |
The PC107A provides a bridge between the PCI bus and PowerPC 603e, PowerPC 740, PowerPC 750 or PC7400 microprocessors.
The processor bus supports frequencies up to 100 MHz.