Alliance Semiconductor AS7C1024B SRAM Datasheet

AS7C31024B 3.3V 128K X 8 CMOS SRAM is a SRAM storage device produced by Alliance Semiconductor. It has industrial and commercial temperature range, 131,072 words x 8 bits organization, 10/12/15/20 ns address access time, 5, 6, 7, 8 ns output enable access time, 252 mW / max @ 10 ns ACTIVE power consumption, 18 mW / max STANDBY power consumption, 6T 0.18u CMOS process, TTL/LVTTL-compatible, three-state I/O, 32-pin JEDEC standard package and other features


Alliance Semiconductor AS7C1024B SRAM Datasheet - cover page
Brand
Alliance Semiconductor
Category
Memory
Document type
Datasheet
Language
English
Pages
10
File format
PDF
File size
123 KB
Published
06 June, 2012
Updated
30 September, 2023
MD5 checksum
32F1B13A066C625BC99B8B78885E4305

About this manual

The AS7C1024B is a high-speed Static Random Access Memory (SRAM) device organized as 131,072 words x 8 bits. It utilizes 6T 0.18µ CMOS technology to achieve low power consumption and high speed with address access times ranging from 10 to 20 ns.

What's inside

  • Features
  • Functional description
  • Absolute maximum ratings
  • Recommended operating conditions
  • DC operating characteristics
  • Read cycle timing
  • Write cycle timing
  • Package dimensions
  • Ordering codes

Specifications

Organization131,072 words x 8 bits
Technology6T 0.18µ CMOS
Supply Voltage (Nominal)3.3 V
Operating Temperature (Commercial)0 to +70 °C
Max Operating Current (10 ns variant)70 mA

Frequently asked questions

What are the available address access times?

The device offers maximum address access times of 10, 12, 15, or 20 ns depending on the specific part number.

Which packages are available for this SRAM?

The AS7C1024B is offered in 32-pin SOJ (300 mil and 400 mil), TSOP I (8x20mm), and sTSOP I (8x13.4mm) packages.

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