AS7C32096A is a 256K × 8 CMOS SRAM from Alliance Semiconductor. It features industrial and commercial temperature, center power and ground pins, high speed, low power consumption, equal access and cycle times, easy memory expansion with CE, OE inputs, TTL-compatible, three-state I/O, JEDEC standard packages, ESD protection and latch-up current.
The AS7C32096A is a high-performance Static Random Access Memory (SRAM) device organized as 262,144 words by 8 bits. It features equal address access and cycle times with output enable access times ranging from 4 to 7 ns, making it suitable for high-speed applications requiring fast data access and low power consumption.
The document details the electrical characteristics, timing parameters, and package dimensions for the device available in a 44-pin TSOP II package. It covers operating conditions for both commercial (0°C to 70°C) and industrial (-40°C to +85°C) temperature ranges.
| Organization | 262,144 words x 8 bits |
|---|---|
| Address Access Time | 10, 12, 15, or 20 ns |
| Output Enable Access Time | 4, 5, 6, or 7 ns |
| Max Active Power Dissipation (10ns) | 650 mW |
| Max Standby Power Consumption | 28.8 mW |
| Package Type | 44-pin TSOP II |
The device is organized as 262,144 words x 8 bits.
The maximum CMOS standby current is 8 mA.