Alliance Semiconductor ASM5P2304B Datasheet

ASM5P2304B is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks in PC, workstation, datacom, telecom and other high-performance applications.


Alliance Semiconductor ASM5P2304B Datasheet - cover page
Brand
Alliance Semiconductor
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
13
File format
PDF
File size
355 KB
Published
08 June, 2012
Updated
30 September, 2023
MD5 checksum
FCF3F4749BCD188290147649155001C0

About this manual

The ASM5P2304B is a versatile, 3.3V zero-delay buffer designed to distribute clocks in PC, workstation, datacom, telecom, and other high-performance applications. It features an on-chip PLL that locks to an input clock presented on the REF pin, with feedback driven to the FBK pin. The device guarantees an input-to-output propagation delay of less than 250pS and output-to-output skew of less than 200pS.

What's inside

  • Features
  • Functional Description
  • Configurations Table
  • Zero Delay and Skew Control
  • Pin Configuration
  • Absolute Maximum Ratings
  • Operating Conditions
  • Electrical Characteristics
  • Switching Characteristics

Specifications

Supply Voltage3.0V to 3.6V
Operating Temperature (Commercial)0°C to 70°C
Input Frequency Range4MHz to 20MHz
Output-to-Output Skew< 200pS
Package Type8-pin SOIC

Frequently asked questions

What is the maximum input frequency?

The device supports an input frequency range from 4MHz to 20MHz.

How many output banks does the device have?

The ASM5P2304B has two banks of four outputs each.

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