Alliance Semiconductor ASM5P2309A/ASM5P2305A Datasheet

The ASM5P2309A / ASM5P2305A 3.3V Zero Delay Buffer is a high performance clock buffer used to distribute high speed clocks on CPU and PCI busses. It has zero input - output propagation delay, multiple low-jitter outputs and less than 250ps output - output jitter.


Alliance Semiconductor ASM5P2309A/ASM5P2305A Datasheet - cover page
Brand
Alliance Semiconductor
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
20
File format
PDF
File size
382 KB
Published
06 June, 2012
Updated
30 September, 2023
MD5 checksum
31DD5EF4AA8244963BA6EC61A7228277

About this manual

This document describes the ASM5P2309A and ASM5P2305A, which are 3.3V zero-delay buffers designed to distribute high-speed clocks with minimal propagation delay. The ASM5P2309A accepts one reference input and drives nine low-skew outputs, while the ASM5P2305A drives five outputs. Both devices utilize an on-chip PLL that locks to an input clock on the REF pin.

What's inside

  • General Features
  • Functional Description
  • Block Diagram
  • Select Input Decoding
  • Pin Configuration
  • Absolute Maximum Ratings
  • Operating Conditions
  • Electrical Characteristics
  • Switching Characteristics

Specifications

Operating Frequency Range15MHz to 133MHz
Supply Voltage3.0V to 3.6V
Operating Temperature (Commercial)0°C to +70°C
Output-to-Output SkewLess than 250ps
Device-to-Device SkewLess than 700ps
Cycle-to-Cycle JitterLess than 200ps

Frequently asked questions

What is the maximum operating frequency for these devices?

The devices support an operating range from 15MHz to 133MHz.

What is the supply voltage requirement?

The devices operate at 3.3V, with a specified range of 3.0V to 3.6V.

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