Alliance Semiconductor AS7C1024B 5V 128K×8 CMOS SRAM Datasheet

AS7C1024B 5V 128K X 8 CMOS SRAM is a high-performance, low-power CMOS SRAM. It has a storage capacity of 131,072 words x 8 bits and can complete read operations in 5/6/7/8 ns. The memory is manufactured using 6T 0.18u CMOS process and has 32-pin JEDEC standard package, which can meet the needs of various applications.


Alliance Semiconductor AS7C1024B 5V 128K×8 CMOS SRAM Datasheet - cover page
Brand
Alliance Semiconductor
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
9
File format
PDF
File size
112 KB
Published
05 June, 2012
Updated
30 September, 2023
MD5 checksum
F7E0053338FC04EA4B8BBCDABF5A60E4

About this manual

The AS7C1024B is a high‑performance 5 V CMOS static RAM organized as 131,072 words × 8 bits, offering fast address access times (10‑20 ns) and low power consumption. It supports active and standby modes with latch‑up current as low as 55 mW in standby.

The device is offered in several JEDEC‑standard packages, including 32‑pin SOJ (300 mil and 400 mil) and 32‑pin TSOP (8 × 20 mm and 8 × 13.4 mm). Detailed timing specifications, absolute maximum ratings, and recommended operating conditions are provided for both commercial and industrial temperature ranges.

What's inside

  • Features
  • Functional description
  • Absolute maximum ratings
  • Recommended operating conditions
  • Read cycle timing
  • Write cycle timing
  • Package dimensions
  • Ordering codes
  • Part numbering system

Specifications

Organization131,072 words × 8 bits
Address access time10‑20 ns
Output enable access time5‑8 ns
Active power consumption605 mW @ 10 ns
Standby power consumption55 mW
Supply voltage (Vcc)4.5 V – 5.5 V

Frequently asked questions

What is the maximum standby current?

The maximum CMOS standby current is 10 mA.

What supply voltage range is recommended for the AS7C1024B?

The device should be powered with a supply voltage between 4.5 V and 5.5 V.

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