The PEEL™ 16CV8-15/-25 is a CMOS programmable electrically erasable logic (PEEL) device that offers an attractive alternative to ordinary PLDs. It is compatible with popular 16V8 devices, supports standard 16V8 JEDEC files, and is offered in 20‑pin DIP, PLCC, SOIC and TSSOP packages.
The handbook details the device’s architecture, including programmable AND/OR arrays, macrocell configurations (Simple, Complex, Registered), speed and power options, design‑security features, and full electrical characteristics. It also lists ordering information and package options for designers and developers.
| Speed options | 15 ns and 25 ns |
|---|---|
| Power consumption (max) | 37 mA @ 25 MHz |
| Supply voltage range | -0.5 V to +6.0 V |
| Storage temperature range | -65 °C to +150 °C |
The device is offered with two speed grades: 15 ns and 25 ns propagation delay.
Power consumption can be as low as 37 mA when operating at 25 MHz.
The device includes a special EEPROM security bit that, when set, prevents reading or copying of the programmed design.