The IDT54/74FCT377T/AT/CT/DT are octal D flip-flops built using an advanced dual metal CMOS technology. They have eight edge-triggered, D-type flip-flops with individual D inputs and O outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s O output. The CE input must be stable only one set-up time prior to the LOW-to-HIGH transition for predictable operation. IDT54/74FCT377T/AT/CT/DT is a fast CMOS octal D flip-flop with clock enable, suitable for military and commercial temperature ranges.
The IDT54/74FCT377 series are fast CMOS octal D flip‑flops with a clock‑enable input. They are offered in several speed grades (Std., A, C, D) and provide true TTL‑compatible inputs and outputs. The device is available in radiation‑tolerant and radiation‑enhanced versions and meets JEDEC and MIL‑STD‑883 specifications.
The document includes detailed pin configurations, absolute maximum ratings, electrical characteristics, power‑supply and switching parameters, test circuits, and ordering information for the various package options (DIP, SOIC, QSOP, CERPACK, LCC).
| Input leakage | <1.1µA (max) |
|---|---|
| VOH (output high voltage) | 3.3V (typ.) |
| VOL (output low voltage) | 0.3V (typ.) |
| High‑drive output current | -15 mA IOH, 48 mA IOL |
| Quiescent power‑supply current | 0.5 mA (max) |
Clock Enable (CE) is active low; when CE is low the clock input is enabled for the flip‑flops.
The device is available in DIP, SOIC, QSOP, CERPACK and LCC packages.