The document describes the features and characteristics of Harris Semiconductor SCHS139D, including hysteresis on clock inputs for improved noise immunity and increased input rise and fall times, asynchronous reset, complementary outputs, buffered inputs, wide operating temperature range, balanced propagation delay and transition times, etc.
The CD54HC107, CD74HC107 and CD74HCT107 are dual J‑K flip‑flops with asynchronous reset and complementary outputs. They use silicon‑gate CMOS technology to provide LSTTL‑compatible speed with low power consumption.
The document provides detailed specifications, including operating temperature range, supply voltage ranges, fan‑out capabilities, absolute maximum ratings, DC electrical parameters, switching performance, pin‑out diagrams, and mechanical drawing data. Ordering information and package options are also listed.
| Operating Temperature Range | -55°C to 125°C |
|---|---|
| Typical Fan‑out (Standard Outputs) | 10 LSTTL loads |
| Maximum Junction Temperature (Plastic Package) | 150 °C |
Standard outputs can drive up to 10 LSTTL loads.
The maximum junction temperature for the plastic package is 150 °C.