CD54AC112, CD74AC112 is a dual J-K negative-edge-triggered flip-flop with clear and preset functions from Texas Instruments.
The CD54AC112 and CD74AC112 devices each contain two independent J‑K negative‑edge‑triggered flip‑flops. They feature clear (CLR) and preset (PRE) inputs that force the outputs low or high regardless of other inputs, and can be used as toggle flip‑flops by tying J and K high. The datasheet provides detailed electrical characteristics, timing requirements, and packaging options for both PDIP and SOIC packages.
Operating specifications include a supply voltage range of –0.5 V to 6 V, output drive currents of up to ±24 mA, and clock‑frequency capabilities up to 114 MHz at 5 V. Ordering information, package drawings, and important warranty and safety notices are also included.
| Supply voltage range (VCC) | -0.5 V to 6 V |
|---|---|
| Output drive current | ±24 mA (fan‑out to 15 F devices) |
| ESD protection | ≥2 kV |
| Storage temperature range | –65 °C to 150 °C |
The devices operate from –0.5 V up to 6 V supply voltage.
Each device can source or sink up to ±24 mA, allowing fan‑out to 15 F devices.
The parts can be stored from –65 °C up to 150 °C.