The 74HC/HCT374 is a high-performance Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT374 is an octal D-type flip-flop that features separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state.
The 74HC/HCT374 is an octal D‑type flip‑flop with positive edge‑triggered operation and 3‑state outputs, compatible with low‑power Schottky TTL. It is intended for bus‑oriented applications where multiple flip‑flops share common clock and output‑enable signals.
The document lists features, pin assignments, functional tables, DC and AC characteristics, timing parameters and package outlines. Electrical specifications such as propagation delay, maximum clock frequency and input capacitance are provided for both HC and HCT variants.
| Maximum clock frequency (HC) | 77 MHz |
|---|---|
| Input capacitance | 3.5 pF |
| Output capability | bus driver |
The outputs go to the high‑impedance OFF‑state.
Pins 3, 4, 7, 8, 13, 14, 17, and 18 are the D inputs.
Typical propagation delay is 16 ns.