The MAX9390/MAX9391 dual 2 x 2 crosspoint switches perform high-speed, low-power, and low-noise signal distribution. The MAX9390/MAX9391 multiplex one of two differential input pairs to either or both low-voltage differential signaling (LVDS) outputs for each channel. Independent enable inputs turn on or turn off each differential output pair. Four LVCMOS/LVTTL logic inputs (two per channel) control the internal connections between inputs and outputs. This flexibility allows for the following configurations: 2 x 2 crosspoint switch, 2:1 mux, 1:2 splitter, or dual repeater. This makes the MAX9390/MAX9391 ideal for protection switching in fault-tolerant systems, loopback switching for diagnostics, fanout buffering for clock/data distribution, and signal regeneration. Fail-safe circuitry forces the outputs to a differential low condition for undriven inputs or when the common-mode voltage exceeds the specified range. The MAX9390 provides high-level input fail-safe detection for LVDS, HSTL, and other GND-referenced differential inputs. The MAX9391 provides low-level input fail-safe detection for LVPECL, CML, and other VCC-referenced differential inputs. Ultra-low 82ps(P-P) (max) pseudorandom bit sequence (PRBS) jitter ensures reliable communications in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 1.5 to 15.8 Gb/s of bandwidth, with eye patterns sufficient to ensure high reliability.
The MAX9390 and MAX9391 are dual 2 × 2 crosspoint switches that route differential inputs to LVDS outputs. They support high‑speed, low‑power operation up to 1.5 GHz and include fail‑safe circuitry that forces a low differential output when inputs are undriven or out of range.
Key features include independent enable pins for each output pair, four LVCMOS/LVTTL control inputs, and flexible configuration as a crosspoint switch, 2:1 mux, 1:2 splitter, or dual repeater. The devices are supplied in a 32‑pin TQFP package and operate from –40 °C to +85 °C.
| Supply Voltage Range | 3.0 V to 3.6 V |
|---|---|
| Operating Temperature Range | -40 °C to +85 °C |
| Maximum Operating Frequency | 1.5 GHz |
| LVDS Output Drive | 100 Ω load |
| Random Jitter | 2 ps RMS (max) |
The devices operate from 3.0 V to 3.6 V supply voltage.
Each output pair is controlled by an EN pin; driving EN high enables the outputs, driving it low disables them.
The switches support up to 1.5 GHz operation, equivalent to a 1.34 Gbps data rate.
Each device provides a dual 2 × 2 configuration, giving two LVDS output pairs per channel.