This document is a user manual for CY7C68310, which mainly introduces the functions, applications, pin definitions, working principles, configuration methods and other information of the product.
The CY7C68310 implements a low‑power bridge between a USB 2.0 port and an ATA/ATAPI mass‑storage interface. It complies with the USB Mass Storage Class Bulk‑Only Transport specification and supports both high‑speed (480 Mbit/s) and full‑speed (12 Mbit/s) USB operation. The device includes a 2‑Kbyte SRAM buffer, supports ATA PIO modes 0‑4 and Ultra DMA modes 0‑4, and can operate in self‑powered or bus‑powered modes.
The datasheet provides complete pin assignments, functional block diagrams, timing characteristics for I²C, USB, and ATA interfaces, as well as external circuitry recommendations, PCB layout guidelines, and ordering information. It also lists absolute maximum ratings, operating conditions, and package details for the 80‑pin TQFP (lead‑free option).
| USB certification | USB 2.0‑certified (TID# 40001426) |
|---|---|
| Supported USB speeds | High‑speed 480 Mbit/s and full‑speed 12 Mbit/s |
| ATA interface modes | ATA PIO modes 0‑4, Ultra DMA modes 0‑4 |
| On‑chip SRAM buffer | 2 Kbyte |
| Package type | 80‑pin TQFP (lead‑free option available) |
| GPIO pins | 3 general‑purpose I/O pins |
| Power modes | Self‑powered and USB bus‑powered |
It supports high‑speed 480 Mbit/s and full‑speed 12 Mbit/s operation.
The CY7C68310 provides three general‑purpose I/O pins.
The device supports ATA PIO modes 0‑4 and Ultra DMA modes 0‑4.
It can operate either self‑powered or powered from the USB bus.