Alliance Semiconductor AS7C513/AS7C3513 5V/3.3V 32K×16 CMOS SRAM Datasheet

AS7C513/AS7C3513 are 5V/3.3V 32K×16 CMOS SRAMs with high speed, low power consumption, 2.0V data retention, TTL compatible, three-state I/O, etc.


Alliance Semiconductor AS7C513/AS7C3513 5V/3.3V 32K×16 CMOS SRAM Datasheet - cover page
Brand
Alliance Semiconductor
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
10
File format
PDF
File size
114 KB
Published
07 May, 2012
Updated
30 September, 2023
MD5 checksum
FB4B721E23246620C7CE49E200CE1313

About this manual

The AS7C513 and AS7C3513 SRAMs are high‑performance 32 K × 16‑bit static RAM devices designed for fast data access, low standby power, and simple interfacing. They support both 5 V (AS7C513) and 3.3 V (AS7C3513) supplies, provide TTL‑compatible three‑state I/O, and include multiple power and ground pins for flexible system design.

Key specifications include address access times of 12 ns, 15 ns or 20 ns (depending on version), output‑enable times of 6 ns‑8 ns, standby power consumption of 28 mW (5 V) or 18 mW (3.3 V), and data‑retention voltage of 2.0 V. The devices are offered in standard 44‑pin SOJ and 44‑pin TSOP II packages.

What's inside

  • Features
  • Selection Guide
  • Functional Description
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Typical DC and AC Characteristics
  • Package Dimensions
  • Ordering Codes
  • Data Retention Characteristics

Specifications

Organization32,768 words × 16 bits
Supply Voltage (AS7C513)5.0 V (typical)
Supply Voltage (AS7C3513)3.3 V (typical)
Maximum Address Access Time12 ns / 15 ns / 20 ns
Maximum Output Enable Access Time6 ns / 7 ns / 8 ns
Data Retention Voltage2.0 V

Frequently asked questions

What are the maximum address access times for the AS7C3513?

The AS7C3513 offers maximum address access times of 12 ns, 15 ns, or 20 ns depending on the version.

What voltage is required for data retention?

A supply voltage of 2.0 V is required for data retention.

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