M54HC137 and M74HC137 are high speed CMOS 3 to 8 line decoder/latch (inverting) fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption.
The M54HC137 and M74HC137 are high‑speed CMOS 3‑to‑8 line decoder/latch devices with built‑in latches on the three address inputs. They feature low power dissipation, high noise immunity and symmetrical output impedance, making them suitable for glitch‑free decoding in bus‑oriented systems.
The datasheet provides absolute maximum ratings, recommended operating conditions, DC and AC electrical characteristics, pin descriptions, mechanical dimensions for both plastic and ceramic DIP‑16 packages, and typical application circuits such as strobe decoders.
| Output Drive Current per Pin | ≥ 4 mA |
|---|---|
| Power Dissipation | 500 mW |
| Storage Temperature Range | -65 °C to +150 °C |
Each output pin can source or sink at least 4 mA.
The maximum power dissipation is 500 mW.