Freescale DSP56367 24-Bit Audio Digital Signal Processor Datasheet

This document briefly descibes the DSP56367 24-bit digital signal processor (DSP). The DSP56367 is a member of the DSP56300 family of programmable CMOS DSPs. The DSP56367 is targeted to applications that require digital audio compression/decompression, sound field processing, acoustic equalization and other digital audio algorithms.


Freescale DSP56367 24-Bit Audio Digital Signal Processor Datasheet - cover page
Brand
Freescale
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
141
File format
PDF
File size
1.7 MB
Published
10 April, 2012
Updated
30 September, 2023
MD5 checksum
B78F489321C9D84CB121C61631B5FEB1

About this manual

The DSP56367 is a 24‑bit audio digital signal processor designed for digital audio compression, sound field processing, acoustic equalization and other audio algorithms. It delivers up to 150 MIPS at 150 MHz with a 1.8 V core supply and 100 MIPS at 100 MHz with a 1.5 V supply.

On‑chip memory includes Y‑Data RAM/ROM, X‑Data RAM/ROM, program ROM, program RAM and bootstrap ROM, while off‑chip expansion supports up to two 16 M × 24‑bit data words and 16 M × 24‑bit program words. Peripheral modules such as ESAI, SHI, HDIO8, DAX and a six‑channel DMA controller provide flexible audio and host interfaces.

What's inside

  • Signal/Connection Descriptions
  • Specifications
  • Packaging
  • Design Considerations
  • Power Consumption Benchmark
  • IBIS Model

Specifications

Maximum MIPS (150 MHz)150 MIPS @ 150 MHz, 1.8 V
Maximum MIPS (100 MHz)100 MIPS @ 100 MHz, 1.5 V
Y‑Data RAM7 K × 24‑bit
Y‑Data ROM8 K × 24‑bit
X‑Data RAM13 K × 24‑bit
X‑Data ROM32 K × 24‑bit
Program ROM40 K × 24‑bit
Program RAM3 K × 24‑bit
Bootstrap ROM192 × 24‑bit
Serial Audio Interface (ESAI)Up to 4 receivers, up to 6 transmitters
Off‑chip Data Memory ExpansionUp to 2 × 16 M × 24‑bit words
Off‑chip Program Memory ExpansionUp to 16 M × 24‑bit words
Power SupplyOperates from 1.8 V; some inputs tolerate 3.3 V
DMA ControllerSix‑channel DMA controller

Frequently asked questions

What is the maximum instruction throughput of the DSP56367?

The DSP56367 can execute up to 150 MIPS at 150 MHz with a 1.8 V core supply, and up to 100 MIPS at 100 MHz with a 1.5 V core supply.

What on‑chip memory is available in the DSP56367?

It includes 7 K×24‑bit Y‑Data RAM, 8 K×24‑bit Y‑Data ROM, 13 K×24‑bit X‑Data RAM, 32 K×24‑bit X‑Data ROM, 40 K×24‑bit Program ROM, 3 K×24‑bit Program RAM, and a 192×24‑bit Bootstrap ROM.

Which peripheral interfaces does the DSP56367 provide?

The device offers a Serial Audio Interface (ESAI), Serial Host Interface (SHI), byte‑wide parallel Host Interface (HDIO8), Digital Audio Transmitter (DAX), a six‑channel DMA controller, and configurable GPIO pins.

What are the power supply requirements for the DSP56367?

The DSP56367 operates from a 1.8 V supply, though some input pins can tolerate 3.3 V.

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