This document describes the PCI interface for the MPC184 Security Coprocessor
This manual describes the Freescale MPC184 Security Co‑Processor, covering its signal descriptions, address map, PCI configuration registers, execution units, descriptors, and crypto‑channels. It includes detailed register maps, programming guidelines, and reference information for system and software implementers.
The document is organized into chapters on signal descriptions, address mapping, PCI configuration, execution unit details (including PKEU, DEU, AFEU, AESU, RNG, etc.), descriptor formats, and controller operation. Revision history and an index are provided at the end.
| PCI Vendor ID Register offset | 0x0000 |
|---|---|
| PCI Device ID Register offset | 0x0002 |
| PCI Command Register offset | 0x0004 |
| Revision ID Register offset | 0x0008 |