This document introduces the technical specifications of TMS320F2810 and TMS320F2812 digital signal processors, including high-performance static CMOS technology, 150 MHz (6.67-ns cycle time), low-power (1.8-V core, 3.3-V I/O) design, 3.3-V flash programming voltage, high-performance CPU (C28x), 16 x 16 and 32 x 32 MAC operations, 16 x 16 dual MAC, Harvard bus architecture, atomic operations, fast interrupt response and processing, unified memory programming model, 4M linear program address reach, 4G linear data address reach, code-efficient (in C/C++ and Assembly), and TMS320F24x/LF240x processor source code compatible.
