The ISL6622A is an Intersil high frequency MOSFET driver designed to drive upper and lower power N-Channel MOSFETs to implement a synchronous rectified Buck converter topology. ISL6622A's advanced PWM protocol is specifically designed to work with Intersil VR11.1 controllers and combined with N-Channel MOSFETs, form a complete core-voltage regulator solution for advanced microprocessors. When ISL6622A detects a PSI protocol sent by an Intersil VR11.1 controller, it activates Diode Emulation (DE) operation; otherwise, it operates in normal Continuous Conduction Mode (CCM) PWM mode. In the 8 Ld SOIC package, the ISL6622A drives the upper gate to 12V while the lower get can be driven from 5V to 12V. The 10 Ld DFN part allows for more flexibility. The upper gate can be driven from 5V to 12V using the UVCC pin and the lower gate can also be driven from 5V to 12V using the LVCC pin. This provides the flexibility necessary to optimize applications involving trade-offs between gate charge and conduction losses. To further enhance light load efficiency, the ISL6622A enables an additional start-up current control function for reducing EMI.
The ISL6622A is a high‑frequency MOSFET driver designed to drive upper and lower N‑Channel MOSFETs in a synchronous‑rectified buck converter. It supports advanced PWM protocols, diode emulation for light‑load efficiency, and adaptive shoot‑through protection. The device is offered in 8‑lead SOIC and 10‑lead DFN packages, with flexible gate‑drive voltage options.
The document provides detailed electrical specifications, absolute maximum ratings, recommended operating conditions, pin descriptions, timing diagrams, and layout recommendations to ensure reliable performance in high‑speed voltage‑regulator applications.
| Upper Gate Drive Voltage (SOIC) | 12 V |
|---|---|
| Lower Gate Drive Voltage (SOIC) | 5 V to 12 V |
| Maximum Operating Junction Temperature | 125 °C |
| Sinking Current Capability | 3 A |
The device can operate with supply voltages up to 15 V.
It can sink up to 3 A.
It includes pre‑POR overvoltage protection that limits the upper gate while VCC is below the POR threshold.