Intersil ISL6610/ISL6610A Datasheet

ISL6610, ISL6610A Dual Synchronous Rectified MOSFET Drivers


Intersil ISL6610/ISL6610A Datasheet - cover page
Brand
Intersil
Category
Power Management
Document type
Datasheet
Language
English
Pages
11
File format
PDF
File size
260 KB
Published
28 March, 2012
Updated
30 September, 2023
MD5 checksum
1B960C0F375C5B208EC3CC394E1FF202

About this manual

The ISL6610 and ISL6610A are dual synchronous rectified MOSFET drivers designed to drive two independent power channels in a buck‑converter topology. They operate from a single 5 V supply and provide fast 10 ns rise/fall times, adaptive shoot‑through protection, and bootstrap‑capacitor over‑charge prevention.

Key features include 4 A typical sink current for the lower gate driver, 0.4 Ω on‑resistance, and compatibility with high‑frequency, low‑profile DC‑DC converters. The devices are offered in 14‑lead SOIC and 16‑lead QFN packages and are RoHS‑compliant. Recommended operating ambient temperature is –40 °C to +85 °C, with an absolute maximum of –40 °C to +125 °C.

What's inside

  • Features
  • Applications
  • Ordering Information
  • Pinouts
  • Absolute Maximum Ratings
  • Thermal Information
  • Recommended Operating Conditions
  • Electrical Specifications
  • Functional Pin Description
  • Layout Considerations

Specifications

Ambient Temperature Range (Absolute Max)-40 °C to +125 °C
Ambient Temperature Range (Recommended)-40 °C to +85 °C
Typical Sink Current (Lower Gate)4 A
On‑Resistance (Lower Gate)0.4 Ω
Package Types14‑lead SOIC, 16‑lead QFN

Frequently asked questions

What is the typical sink current for the lower gate driver?

The lower gate driver can sink up to 4 A typical current.

What ambient temperature range is recommended for operation?

The device is recommended to operate between –40 °C and +85 °C.

Which package options are available for the ISL6610?

It is offered in a 14‑lead SOIC package and a 16‑lead QFN package.

How does adaptive shoot‑through protection work?

The circuitry monitors the LGATE voltage and, after a short delay, turns on the upper gate to prevent both MOSFETs from conducting simultaneously.

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