The AD9551 is a multiservice clock generator that can perform translation between any two standard network rates. It has dual reference inputs and dual clock outputs, supports standard forward error correction (FEC) rates, and features holdover operation and hitless switchover capabilities.
The AD9551 clock generator accepts one or two reference inputs and provides up to two output signals whose frequencies are related by a programmable factor from 1 to 63. It supports both single‑ended and differential operation, includes an internal VCO, and offers hit‑less switchover, holdover, and standard FEC rates.
The device is programmed via a 3‑wire SPI interface or pin‑selectable dividers, runs from a single 3.3 V supply, and provides extensive specifications for jitter, power consumption, and I/O characteristics, making it suitable for network clock translation, routers, and other high‑performance timing applications.
| Input Frequency Range | 19.44 MHz – 806 MHz |
|---|---|
| Output Frequency Range | 10 MHz – 777.6 MHz |
| Jitter (typical) | < 0.5 ps rms (12 kHz – 20 MHz) |
| Total Supply Current | 140 mA (max) |
| Supply Voltage | 3.3 V (single supply) |
| Logic Input High Voltage (CMOS) | 1.2 V |
| Logic Output High Voltage (CMOS) | 2.7 V |
The AD9551 accepts reference inputs from 19.44 MHz up to 806 MHz.
It can generate output frequencies from 10 MHz to 777.6 MHz.
Jitter is less than 0.5 ps rms for a loop bandwidth of 12 kHz to 20 MHz.
The device operates from a single 3.3 V supply.