The AD9520-2 is a 12 LVPECL/24 CMOS output clock generator with integrated 2.2 GHz VCO. It features low phase noise and phase-locked loop (PLL).
The AD9520-2 provides a multi‑output clock distribution function with sub‑picosecond jitter performance. It integrates a PLL, VCO (2.02‑2.335 GHz) and offers twelve LVPECL outputs that can be re‑configured as CMOS pairs, with programmable dividers and zero‑delay operation. The device is supplied from a single 3.3 V rail and includes an EEPROM for non‑volatile configuration.
Typical applications include high‑speed ADC/DAC clocking, 10 Gbps communication protocols, wireless transceivers and test instrumentation. The datasheet details functional block diagrams, pin descriptions, timing characteristics, serial control (SPI/I²C) and full specification tables for power, PLL, inputs and outputs.
| LVPECL outputs | 12 |
|---|---|
| Maximum output frequency | 2400 MHz |
| Supply voltage (VS) | 3.135 V – 3.465 V (typ. 3.3 V) |
| Operating temperature range | −40 °C to +85 °C |
| On‑chip VCO frequency range | 2.02 GHz – 2.335 GHz |
| CMOS output capability | Each LVPECL output can be configured as 2 CMOS outputs |
The device operates from a 3.3 V supply; the VS pin is specified as 3.135 V – 3.465 V.
The AD9520‑2 provides twelve LVPECL outputs arranged in four groups.
The on‑chip VCO tunes from 2.02 GHz to 2.335 GHz.
It accepts CMOS, LVDS or LVPECL reference signals up to 250 MHz.