Industrial

This datasheet provides information on absolute maximum ratings for IRFE310, JANTX-, JANTXV-, 2N6786U including continuous drain current, continuous drain current, pulsed drain current, max. power dissipation, linear derating factor, gate-to-source voltage, single pulse avalanche energy, peak diode recovery dv/dt, operating junction temperature, storage temperature range, surface temperature and weight.

This data sheet provides the characteristics parameters of IXYS IXSH series 600V IGBT.

ISL6227 is a dual PWM controller from ISL company, which adopts synchronous buck DC/DC converter and can provide power regulation for DDR memory, chipset, graphics and other system electronics. It supports AC/DC adaptor or Li-ion battery pack and automatically switches mode under heavy load and light load to ensure high efficiency under various conditions.

The ISL43840 is a low-voltage, single and dual supply, dual 4 to 1 multiplexer analog switch with enable function. Produced by Intersil, this product is designed to operate from a single +2V to +12V supply or from a ±2V to ±6V supply. Each switch can handle rail to rail analog signals. It features low off-leakage current and a wide range of digital input logic thresholds, making it suitable for various application scenarios.

IRM-3738S18 is a miniature infrared remote control system receiver module that has been developed and designed by utilizing the most updated IC technology.

IN74LV623 is an 8-way 3-state non-inverting bus transceiver, compatible with 74HC623A, 74HCT623A series microcircuits, input voltage range is 1.2-3.6V, working temperature range is -40-125℃.

DSC-6223/4 CODEC is a 4-channel CODEC chip produced by IDT. It supports A/µ-law and linear coding, meets ITU-T G.711-G.714 standards, has programmable digital filters, supports two programmable PCM buses, and MPI control interface, broadcast mode, 7 SLIC signaling pins, fast hardware ring trip mechanism, 2 programmable tone generators, two programmable chopper clocks, selectable master clock frequency, advanced test functions, 300 Ω AC high analog drive capability, 3 V digital I/O, +3.3 V single power supply, low power consumption, and -40°C to +85°C operating temperature range.

The IDT71V3556 and IDT71V3558 are 3.3V high-speed 4,718,592-bit (4.5 Mega-bit) synchronous SRAMs. They are designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, they have been given the name ZBTTM, or Zero Bus Turnaround. Address and control signals are applied to the SRAM during one clock cycle, and two cycles later the associated data cycle occurs, be it read or write. The IDT71V3556/58 contain data I/O, address and control signal registers. Output enable is the only asynchronous signal and can be used to disable the outputs at any given time. A Clock Enable (CEN) pin allows operation of the IDT71V3556/58 to be suspended as long as necessary. All synchronous inputs are ignored when (CEN) is high and the internal device registers will hold their previous values. There are three chip enable pins (CE1, CE2, CE2) that allow the user to deselect the device when desired. If any one of these three are not asserted when ADV/LD is low, no new memory operation can be initiated. However, any pending data transfers (reads or writes) will be completed. The data bus will tri-state two cycles after chip is deselected or a write is initiated.

The IDT7005S/L high-speed 8K x 8 Dual-Port Static RAM has true Dual-Ported memory cells which allow simultaneous access of the same memory location, with high-speed access and low-power operation. It can be expanded using the Master/Slave select when cascading more than one device.

2SJ0164 is a silicon P-channel junction field effect transistor from Toshiba with low on-resistance and low noise characteristics.

2SK3193 is a N-channel power MOSFET produced by Mitsubishi Electric. It is mainly used in switching circuits. This device has the characteristics of high avalanche energy capability, high switching speed, low on resistance and no secondary breakdown.