This document introduces the features of the ARM926EJ-S core, including DSP instruction extensions, ARM Jazelle technology, 8KB data cache, 8KB instruction cache, write buffer, 200MIPS processing speed, memory management unit, EmbeddedICE debug communication channel support. It also introduces embedded memories, external bus interface, USB 2.0 full-speed device port, USB 2.0 full-speed host port, Ethernet MAC 10/100 Base T, image sensor interface, bus matrix, system controller, etc.