ATMEL Manuals

The TS80C52X2 is a high-performance CMOS ROM, OTP, EPROM and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller. The TS80C52X2 retains all features of the 80C51 with extended ROM/EPROM capacity (8 Kbytes), 256 bytes of internal RAM, a 6-source, 4-level interrupt system, an on-chip oscillator and three timer/counters. In addition, the TS80C52X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication (EUART) and an X2 speed improvement mechanism. The fully static design ensures higher speed in low-power conditions.

This document describes the features and characteristics of the Atmel TS8xC51Rx2 microcontroller, including 80C51 compatibility, high-speed architecture, dual data pointer, on-chip ROM/EPROM and expanded RAM, programmable clock and counters, etc.

AT8xC5103 is a high-performance ROM/OTP version of the 80C51 8-bit Micro-controller in 16 and 24-pin packages.

The AT89LP2052/LP4052 is an 8-bit CMOS microcontroller from Atmel that features 2/4K bytes of In-System Programmable Flash memory. The device is manufactured using Atmel's high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. The AT89LP2052/LP4052 is built around an enhanced CPU core that can fetch a single byte from memory every clock cycle. In low-power mode, the device consumes less than 100µA.

AT89LP216 is a low-power, high-performance CMOS 8-bit microcontroller that has 2k bytes of ISP Flash memory. The product is manufactured using Atmel's high-density non-volatile memory technology and is compatible with the industrial standard de's MCS51 instruction set. AT89LP216 is based on an enhanced CPU core that reads single-byte instructions per clock cycle. In the classic 8051 structure, each read requires 6 clock cycles, making the execution of instructions require 12, 24 or 48 clock cycles. In the AT89LP216 CPU, instructions only require 1 to 4 clock cycles to achieve 6 to 12 times the speed of conventional 8051. 70% of the instruction bytes are equal to the number of clock cycles executed, and other instructions only require one additional clock. At the same power consumption, the enhanced CPU core can reach 20MIPS, while the conventional 8051CPU can only reach 4MIPS. Conversely, at the same operating speed, the new CPU core has a lower clock speed and power consumption than the traditional 8051.

AT89LP213/214 is a low-power, high-performance, CMOS 8-bit microcontroller with 2K bytes of in-system programmable Flash memory. The device is manufactured using Atmel's high-density non-volatile memory technology and is compatible with the industry standard MCS-51 instruction set. AT89LP213/214 is built on an enhanced one-byte-per-clock CPU core. In the classical 8051 architecture, each byte fetch takes 6 clock cycles, which results in 12, 24 or 48 clock cycles to execute an instruction. In the AT89LP213/214 CPU, instruction execution takes only 1 to 4 clock cycles, resulting in a throughput that is 6 to 12 times faster than standard 8051. Seventy percent of the instructions only require the same number of clock cycles as their byte size.

The AT89S8253 is a low-power, high-performance CMOS 8-bit microcontroller with 12K bytes of In-System Programmable (ISP) Flash program memory and 2K bytes of EEPROM data memory. The device is manufactured using Atmel’s high-density non-volatile memory technology and is compatible with the industry-standard MCS-51 instruction set.

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.

The AT89S2051/S4051 is a low-voltage, high-performance CMOS 8-bit microcontroller with 2K/4K bytes of In-System Programmable (ISP) Flash program memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89S2051/S4051 is a powerful microcontroller which provides a highly-flexible and cost-effective solution.

The AT89LS52 is a low-voltage, high-performance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. It is compatible with the industry-standard 80C51 instruction set and pinout.

AT89LS51 is a low-voltage, high-performance CMOS 8-bit microcontroller produced by Atmel. It has a 4K byte on-chip programmable Flash memory that can be reprogrammed in-system or by a conventional non-volatile memory programmer. AT89LS51 also integrates 128 bytes of RAM, 32 I/O pins, watchdog timer, two data pointers, two 16-bit timers/counters, five-vector two-level interrupt architecture, low-power idle mode and power-down mode.

The document describes the features and characteristics of a microcontroller product that is 80C52 compatible, including six 8-bit I/O ports, three 16-bit timer/counters, 256 bytes of scratch pad RAM, etc.

This document introduces the features of the AT89C51ED2 chip, including 80C52 compatibility, 8051 instruction compatibility, six 8-bit I/O ports, three 16-bit timers/counters, 256 bytes of erasable scratchpad RAM, 9 interrupt sources, 4 priority levels, integrated power monitor, ISP (in-system programming), 2048 bytes of boot ROM, etc.

The 80E52 is the successor to the Intel 8051 microcontroller, and is an 8-bit single-chip microcomputer with an 8051 compatible instruction set. The 80E52 has all the features of the 80C52, and also adds some enhanced features, such as 3 16-bit timers/counters, 1024 bytes of internal expanded RAM, and asynchronous port reset function.