ANALOG Manuals

This document describes the features and characteristics of the ADN4691E/ADN4693E/ADN4696E/ADN4697E high-speed M-LVDS transceivers, including operating voltage, data transfer rate, half-duplex and full-duplex modes, etc.

The 3 V LVDS Quad CMOS Differential Line Receiver ADN4668 is a four-channel CMOS differential line receiver from Analog Devices. It has a 3.3 V power supply, supports 400 Mbps (200 MHz) switching rates, and has ±15 kV ESD protection on the receiver input pins. It supports small swing (310 mV typical) differential input signal levels, supports open, short, and terminated input fail-safe, and conforms to the TIA/EIA-644 LVDS standard.

ADN4667 is a quad, CMOS, low voltage differential line driver with features such as high ESD protection, high switching rates, simplified PCB layout, low power dissipation, interoperability with existing 5V LVDS receivers, etc.

ADN4666 is a 3.3V LVDS quad CMOS differential line receiver with ±8kV ESD IEC 61000-4-2 contact discharge, 400Mbps (200MHz) switching rates, 100ps channel-to-channel skew, 100ps differential skew, 3.3ns propagation delay, 3.3V power supply, high impedance outputs on power-down, low power design, 10 mW quiescent typical power consumption, interoperable with existing 5V LVDS drivers, supports small swing (350 mV typical) differential input signal levels, supports open, short, and terminated input fail-safe, conforms to TIA/EIA-644 LVDS standard, industrial operating temperature range of -40°C to +85°C, available in surface-mount SOIC package and low profile TSSOP package.

The ADN4665 is a 3V, LVDS, Quad, CMOS differential line driver. It has ±15kV ESD protection, 400 Mbps (200 MHz) switching rates, 100 ps typical differential skew, 400 ps maximum differential skew, 2 ns maximum propagation delay, 3.3 V power supply, ±350 mV differential signaling, low power dissipation (13 mW typical), interoperability with existing 5 V LVDS receivers, high impedance on LVDS outputs on power-down, compliance with TIA/EIA-644 LVDS standards, industrial operating temperature range of -40°C to +85°C, and is available in surface-mount SOIC package and low profile TSSOP package.

The ADN4664 is a dual-channel, 3V, CMOS, LVDS differential line receiver. It features 15kV ESD protection, 400Mbps (200MHz) switching rates, 100ps channel-to-channel skew (typical), 2.5ns maximum propagation delay, 3.3V power supply, high impedance outputs, low power design (typical 3mW), interoperability with existing 5V LVDS drivers, support for small swing (310mV typical) differential signal levels, support for open, short, and terminated input fail-safe, 0V to -100mV threshold region, compliance with TIA/EIA-644 LVDS standard, an industrial operating temperature range of -40°C to +85°C, and a surface-mount (SOIC) package.

The ADN4663 is a dual, CMOS, low voltage differential signaling (LVDS) line driver that offers 600 Mbps of high-speed transmission rates and a 3.3V power supply voltage. The driver features ±15 kV of ESD protection, 300 ps of typical differential skew and 1.5 ns of maximum propagation delay. It conforms to the TIA/EIA-644 LVDS standard and is interoperable with existing 5 V LVDS receivers. The driver is suitable for backplane data transmission, cable data transmission and clock distribution applications.

ADN4662 is a single-channel, 3V, CMOS, LVDS differential line receiver from Analog Devices, which has ±15 kV ESD protection, 400 Mbps (200 MHz) switching rates, a simple PCB layout, 2.5 ns maximum propagation delay, 3.3 V power supply, high impedance outputs, and low power design.

The ADN4661 is a single-chip CMOS low-voltage differential signaling (LVDS) line driver that supports ±15 kV ESD protection, 600 Mbps (300 MHz) switching rates, 3.3 V power supply, ±355 mV differential signaling, low power consumption, and is suitable for backplane data transmission, cable data transmission, clock distribution and other applications

The ADG3243 is a 2.5 V or 3.3 V, 2-bit, 2-port digital switch with individual channel control. It is designed on a low voltage CMOS process, which provides low power dissipation yet gives high switching speed and very low on resistance. This allows the inputs to be connected to the outputs without additional propagation delay or generating additional noise.

This datasheet provides detailed information about 2.5 V/3.3 V, 2-Bit Common Control Level Translator Bus Switch ADG3242 Rev. A, including features, applications, pin diagram, etc.

ADG3241 is a 2.5V or 3.3V single digital switch, designed on a low voltage CMOS process that provides low power dissipation yet gives high switching speed and very low on resistance

The ADG3249 is a 2.5 V or 3.3 V, high performance 2:1 multi- plexer/demultiplexer bus switch. It is designed on a low voltage CMOS process, which provides low power dissipation yet gives high switching speed and very low on resistance. This allows the input to be connected to different voltage rails, thus achieving voltage translation.

The ADG3248 is a 2.5 V or 3.3 V, high performance 2:1 multiplexer/demultiplexer. It is designed on a low voltage CMOS process, which provides low power dissipation yet gives high switching speed and very low on resistance. The low on resistance allows level translation and bus switching at high data rates without introducing significant signal degradation. The device features low power consumption, high switching speed, and low on resistance.

ADG3247 is a 2.5 V or 3.3 V 16-bit, 2-port digital switch. Designed in Analog Devices' low voltage CMOS process, it provides low power dissipation but achieves high switching speed and very low on resistance, enabling its use in a variety of high performance applications.