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- 2012-06-05
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Alliance Semiconductor AS7C3364NTF32B AS7C3364NTF36B 3.3V 64K × 32/36 Flowthrough Synchronous SRAM with NTD
The AS7C3364NTF32B and AS7C3364NTF36B are 2 Mbit CMOS synchronous SRAMs organized as 65,536 words × 32 or 36 bits. They feature the No Turnaround Delay (NTD) architecture, fast clock‑to‑data access (7.5‑10 ns), and optional snooze mode for low‑power standby.
The devices operate from a 3.3 V core supply (VDD = 3.3 V + 0.165 V) with separate I/O supplies of 3.3 V or 2.5 V. They are offered in a 100‑pin TQFP package and support multiple chip‑enable pins, byte‑write enables, and burst‑mode operation.
Alliance Semiconductor AS7C3364NTF32B specifications
| Organization | 65,536 words × 32 or 36 bits |
|---|---|
| Core supply voltage (VDD) | 3.3 V + 0.165 V |
| I/O supply voltage (VDDQ) | 3.3 V + 0.165 V for 3.3 V VO, 2.5 V + 0.125 V for 2.5 V VO |
| Package | 100‑pin TQFP |
| Clock‑to‑data access time | 7.5 ns / 8.0 ns / 10.0 ns |
| OE access time | 3.5 ns / 4.0 ns |
| Maximum operating current | 260 mA (32‑bit) / 230 mA (36‑bit) |
| Maximum standby current | 110 mA (32‑bit) / 100 mA (36‑bit) |
| Snooze mode standby current | 30 mA |
All Alliance Semiconductor AS7C3364NTF32B documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What does NTD stand for?
NTD stands for No Turnaround Delay, a trademark of Alliance Semiconductor.
What package is the SRAM offered in?
The SRAM is supplied in a 100‑pin TQFP package.
What is the fast clock‑to‑data access time?
The device provides a fast clock‑to‑data access time of 7.5 ns, 8.0 ns, or 10.0 ns depending on the configuration.
From: Alliance Semiconductor AS7C3364NTF32B/36B SRAM Datasheet
What is the maximum standby current?
Maximum standby current is 110 mA at 3.3 V, 100 mA at 2.5 V, and 90 mA for other variants.
From: Alliance Semiconductor AS7C3364NTF32B/36B SRAM Datasheet