Analog Devices ADSP-218x Mode D Pin Compatibility FAQ

About this manual

This document is an Engineer-to-Engineer Note (EE-102) from Analog Devices that addresses technical questions regarding the Mode D pin found in the ADSP-218x family of DSPs. It details how the Mode D pin configuration affects the orientation of the IDMA Acknowledge (IACK) signal after a chip reset, specifically distinguishing between active driven and open source configurations.

What's inside

• What is Mode D?
• Which DSPs contain Mode D?
• How does Mode D affect IACK?
• Determining pull-down resistor value
• Designing for Mode D compatibility

Specifications

Frequently asked questions

What is Mode D and which DSPs contain it?

Mode D is a multiplexed pin used to set the orientation of IDMA Acknowledge (IACK) after chip reset. It is contained on the ADSP-2187L (Revisions 1.0 and greater), and all revisions of the ADSP-2185M, ADSP-2186M, ADSP-2187M, ADSP-2188M, and ADSP-2189M processors.

How can I design a system without Mode D to work with a DSP that uses Mode D?

Drive PF3 to logic '0' on reset if using IACK as an actively driven signal, or drive PF3 to logic high if configuring IACK as an open sourced pin.